Project manager · systems engineer · still hands-on
Javier González
I lead embedded and software projects, and I still write the code. PMP®-certified, with an FPGA and embedded systems background — equally at home running a project or working as an individual contributor.
Selected work
Personal Projects
Projects I have built outside of work — where the software engineering habits meet whatever I felt like learning that month.
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01
hdlsnip.nvim
VHDL templates rendered from Lua rather than pasted. A parameter can add a reset, change a handshake or restructure a process, because the template is code that generates code. Twenty-one templates, from a counter to an AXI4-Lite slave. It also reads the entities already in the project and writes their instantiations and testbenches. Every fixture is compiled and style-checked in CI.
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02
Frame Extractor
Extract video frames as PNG or JPEG, from the command line or as a Python library. Built on ffmpeg, it turns the cases where ffmpeg quietly returns a wrong answer into clear errors. Published to PyPI automatically on each release.
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03
HDL tooling for Neovim
Three merged pull requests on the editor tooling for hardware description languages. VHDL had no indent query in Neovim, so every buffer fell back to a Vimscript file written for the 1993 standard. Wrote the query, anchored so the indent cannot compound, with thirteen reference files testing it as a no-op. Two language-server root fixes merged alongside it.
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04
FVM Landing Website
The landing page for FVM, an ESA-funded formal verification methodology from the Universidad de Sevilla, held everything a visitor needed and surfaced none of it. Rebuilt around the evidence its audience of verification engineers actually wanted. Vanilla HTML, CSS and JavaScript.
# ffmpeg: start time past the end of a 2.3s clip
$ ffmpeg -ss 9999 -i clip.mp4 -frames:v 1 out.png
# exits 0. writes nothing. no error.
# same request, rejected
$ frame-extractor clip.mp4 --start 9999.0
error: --start (9999.0s) is at or past the end of the video (2.300s) ...What I work with
Technical knowledge
Grouped by domain, with a note on where each one comes from.
- Delivery
- Project Management Profesional (PMP®), Software Delivery, Agile and Hybrid, Cost and Schedule control, Risk Management
- PMO governance across a multi-programme portfolio.
- Software
- C, C++, Python, Lua, HTML, CSS, JavaScript, Bash
- A VHDL code generator, a CLI library on PyPI, Neovim tooling, web design.
- Hardware & embedded
- FPGA architecture, VHDL, Xilinx UltraScale, Atmel microcontrollers, RTOS, PCIe, AXI, Imaging sensors
- Star Tracker image pipeline and FPGA fault-injection research.
- Tooling
- Git, Linux, GitHub Actions, GitLab, Neovim, Vivado, MS Project
- Git-based change control across a firmware team and project management experience.
How I got here
Professional Background
I started in research, building PCIe communications architecture for FPGA fault injection at the University of Seville, with a stint at ITSOFT prototyping IoT systems and demoing them to customers. After that I led the FPGA development for a Star Tracker, then moved into running programmes around that work as a Technical Project Manager, led the software engineering team, and finally transitioned to PM Officer, responsible for the full customer portfolio. I still write the code; the projects above are what that looks like now.
- FPGA Engineer
- Technical PM
- SW Engineering Manager
- PM Officer
Get in touch
Contact
Open to project management, systems engineering and Individual Contributions (IC) work in software and embedded systems. Email is the fastest way to reach me.
